Real Intent Sets the Pace at DAC 2016 for Fun, Faster Verification and Design Success

SUNNYVALE, CALIF — (MARKET WIRE) May 25, 2016

– Who

Real Intent, known for its blazingly fast, precise functional verification solutions proven to accelerate RTL verification and sign-off of giga-gate SoC and FPGA designs

– What

Is bringing its advanced Ascent and Meridian technology, EDA expertise and espresso energy to the 53rd Design Automation Conference (DAC) in Austin, Texas, June 5-9, 2016. In the spirit of faster verification and design success, Real Intent invites attendees to Booth #527 to:

  • Learn the latest information about Real Intent’s Ascent family of tools for the fastest static RTL verification prior to synthesis and simulation, and its Meridian tools that enable CDC and SDC sign-off at the RTL and gate-level.
  • View technical presentations to get up to speed on Real Intent’s latest advancements, proven on giga-gate SoC and FPGA designs. Click here to make an appointment for our private suite presentations.
  • Complete a quick verification survey to be entered into drawings for a cool Roku 4streaming player and an Amazon Echo wireless speaker and voice commander.
  • Espresso Yourself and enjoy a high-speed coffee from our DeLonghi Magnificasuper-automatic coffee machine, to celebrate faster verification and design.
  • Visit Real Intent and OpenText (Booth #638), Real Intent’s “Espresso Yourself ” partner at DAC; get a ticket stamped by both companies to enter drawings to win $100 Amazon Gift Cards.
  • Receive a rose as a sweet thank-you gift.

Real Intent also invites attendees to view What is the Real Cost of Verification — a stimulating panel on Thursday, June 9, from 3:30 — 4:30 p.m. in room 18AB. Moderated by Kelly Larson of Paradigm Works, panelists Harry Foster of Mentor Graphics Corp., Pranav Ashar of Real Intent, Inc., Raviv Gal of IBM Research, and Subhasish Mitra of Stanford University will discuss what design cost really includes. They also will explore how to measure and improve verification coverage, reduce rework, and improve the chances of first-time silicon success.

The Design Automation Conference (DAC) is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP). DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. 7,000 attendees come from all over the world to learn about products and solutions that bring additional value to the industry. This audience represents decision-makers at all levels of the buying process from the leading semiconductor, computer, telecommunication and consumer electronics companies.

– When/Where

Exhibit in Booth #527:
Mon., Tue., Wed. June 6, 7, 8
10 a.m. — 6 p.m.
At the Austin Convention Center
500 E Cesar Chavez St.
Austin, TX 78701, United States

About Real Intent

Companies worldwide rely on Real Intent’s EDA software to accelerate early functional verification and advanced sign-off of electronic designs. Real Intent’s comprehensive CDC verification, advanced RTL analysis and sign-off solutions eliminate complex failure modes of SoCs, and lead the market in performance, capacity, accuracy and completeness. Please visitwww.realintent.com for more information.

Real Intent and the Real Intent logo are registered trademarks, and Ascent, Meridian and iDebug are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners.

Acronyms

CDC: Clock Domain Crossing
EDA: Electronic Design Automation
FPGA: Field Programmable Gate Array
RTL: Register Transfer Level
SoC: Systems on Chip